✓ Fi.CI.BAT: success for Introduce DG1

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Title: Project List - Patchwork
Patch Details
Series:Introduce DG1
URL:https://patchwork.freedesktop.org/series/82594/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18682/index.html

CI Bug Log - changes from CI_DRM_9131 -> Patchwork_18682

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18682/index.html

Known issues

Here are the changes found in Patchwork_18682 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (48 -> 41)

Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus

Build changes

CI-20190529: 20190529
CI_DRM_9131: 14f6fc98077f4add3c28104ffbc841ad129fefd6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5811: 836f8812f0e6c44674c1c75501640eabbdd8918a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18682: 3200a254244e6327f45417ce96c112968864228f @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

3200a254244e drm/i915/dgfx: define llc and snooping behaviour
ef788aaa1608 drm/i915/dg1: Update DMC_DEBUG register
ad249d6324c6 drm/i915/dg1: DG1 does not support DC6
5da8aa482e31 drm/i915/dg1: Add initial DG1 workarounds
51a8641ffb98 drm/i915/dg1: Load DMC
2277e81c77bb drm/i915/dg1: Enable ports
4a9095a0b7bb drm/i915/dg1: map/unmap pll clocks
5c559e0d9227 drm/i915/dg1: invert HPD pins
b60e1f572176 drm/i915/dg1: add hpd interrupt handling
bd28cc6aa15c drm/i915/dg1: Enable DPLL for DG1
4718a2b29fcc drm/i915/dg1: Add and setup DPLLs for DG1
427e81efb3e5 drm/i915/dg1: Add DPLL macros for DG1
d0032ba13005 drm/i915/dg1: Add DG1 power wells
68df339f83b7 drm/i915/cnl: skip PW_DDI_F on certain skus
8623a162621b drm/i915/display: allow to skip certain power wells

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