From: Jeff McGee <jeff.mcgee@xxxxxxxxx> It is possible for the hardware to be reset just as a context is completing. The reset post-processing may see the seqno update and assume that the context escaped corruption, but the context may have been disrupted in the save out process. The corruption may screw up the HEAD and TAIL pointers such that the next submission of the context switches out without running the intended request. The GEM_BUG_ON will be hit in this situation, but it is not really a driver error. So make it a GEM_WARN_ON so that we notice while letting hangcheck detect and clean up. This patch is required to support the force preemption feature. Test: Run IGT gem_exec_fpreempt repeatedly with CONFIG_DRM_I915_DEBUG_GEM. Change-Id: I87da4b16bad805fe48153a9ed9169900681ebba7 Signed-off-by: Jeff McGee <jeff.mcgee@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_lrc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index b44861459d24..7d93fcd56d34 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -920,7 +920,7 @@ static void intel_lrc_irq_handler(unsigned long data) GEM_BUG_ON(count == 0); if (--count == 0) { GEM_BUG_ON(status & GEN8_CTX_STATUS_PREEMPTED); - GEM_BUG_ON(!i915_gem_request_completed(rq)); + GEM_WARN_ON(!i915_gem_request_completed(rq)); execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_OUT); trace_i915_gem_request_out(rq); -- 2.16.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx