From: Jeff McGee <jeff.mcgee@xxxxxxxxx> Force preemption uses engine reset to enforce a limit on the time that a request targeted for preemption can block. This feature is a requirement in automotive systems where the GPU may be shared by clients of critically high priority and clients of low priority that may not have been curated to be preemption friendly. There may be more general applications of this feature. I'm sharing as an RFC to stimulate that discussion and also to get any technical feedback that I can before submitting to the product kernel that needs this. I have developed the patches for ease of rebase, given that this is for the moment considered a non-upstreamable feature. It would be possible to refactor hangcheck to fully incorporate force preemption as another tier of patience (or impatience) with the running request. Jeff McGee (8): drm/i915: Downgrade tasklet GEM_BUG_ON for request not completed drm/i915: Skip CSB processing on invalid CSB tail drm/i915: Execlists to mark the HWSP upon preemption finished drm/i915: Add a wait_for routine with more exact timeout drm/i915: Consider preemption when finding the active request drm/i915: Repair the preemption context if hit by reset drm/i915: Allow reset without error capture drm/i915: Force preemption to complete via engine reset drivers/gpu/drm/i915/i915_drv.c | 14 +++++- drivers/gpu/drm/i915/i915_drv.h | 4 ++ drivers/gpu/drm/i915/i915_gem.c | 86 ++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/i915_irq.c | 75 ++++++++++++++++------------ drivers/gpu/drm/i915/i915_params.c | 3 ++ drivers/gpu/drm/i915/i915_params.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 22 +++++++++ drivers/gpu/drm/i915/intel_engine_cs.c | 53 ++++++++++++++++++++ drivers/gpu/drm/i915/intel_lrc.c | 81 +++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/intel_ringbuffer.h | 20 +++++++- 10 files changed, 314 insertions(+), 45 deletions(-) -- 2.16.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
