From: Jeff McGee <jeff.mcgee@xxxxxxxxx>
It is possible for the preemption context to be active on an engine
when the engine is reset. The preemption context is not tracked via
the request mechanism, so the normal reset handling will not detect
this scenario and will not be able to fixup possible context
corruption. So add some extra logic to do this.
This patch is required to support the force preemption feature.
Test: Run IGT gem_exec_fpreempt repeatedly.
Change-Id: Ifd0f17726111f3b702dd900064b7f375bbb42808
Signed-off-by: Jeff McGee <jeff.mcgee@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_lrc.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index b2f838c484b0..581483886153 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1619,6 +1619,25 @@ static void reset_common_ring(struct intel_engine_cs *engine,
spin_unlock_irqrestore(&engine->timeline->lock, flags);
+ /* If a preemption was pending when the reset occurred, and no
+ * active request was found when the reset completed, it is
+ * possible that the preemption context was hit by the reset.
+ * We must assume that the context is corrupted so repair it.
+ */
+ if (execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT) &&
+ !request) {
+ struct i915_gem_context *ctx = engine->i915->preempt_context;
+ ce = &ctx->engine[engine->id];
+
+ execlists_init_reg_state(ce->lrc_reg_state,
+ ctx, engine, ce->ring);
+ ce->lrc_reg_state[CTX_RING_BUFFER_START+1] =
+ i915_ggtt_offset(ce->ring->vma);
+ ce->lrc_reg_state[CTX_RING_HEAD+1] = ce->ring->tail;
+
+ return;
+ }
+
/* If the request was innocent, we leave the request in the ELSP
* and will try to replay it on restarting. The context image may
* have been corrupted by the reset, in which case we may have
--
2.16.2
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