Indeed very clear there... I don't know how did this never caused any big trouble... Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> On Thu, Jun 29, 2017 at 8:36 AM, Imre Deak <imre.deak@xxxxxxxxx> wrote: > Bspec requires leaving the misc IO power well enabled during display > uninit, so align the code accordingly. > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index fd59016..8418879 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -2694,9 +2694,10 @@ static void skl_display_core_uninit(struct drm_i915_private *dev_priv) > > mutex_lock(&power_domains->lock); > > - well = lookup_power_well(dev_priv, SKL_DISP_PW_MISC_IO); > - intel_power_well_disable(dev_priv, well); > - > + /* > + * BSpec says to keep the MISC IO power well enabled here, only > + * remove our request for power well 1. > + */ > well = lookup_power_well(dev_priv, SKL_DISP_PW_1); > intel_power_well_disable(dev_priv, well); > > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
