This patchset aligns the display uninit sequence with Bspec, wrt. to disabling power well 1 and the misc IO power well. It also tunes down a timeout WARN to be a debug message when waiting for power wells to get disabled while KVMR is active. Imre Deak (5): drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling drm/i915/skl: Don't disable misc IO power well during display uninit drm/i915/bxt,glk: Fix assert on conditions for DC9 enabling drm/i915/gen9+: Don't remove secondary power well requests drm/i915/cnl: Fix comment about AUX IO power well enable/disable drivers/gpu/drm/i915/intel_runtime_pm.c | 137 ++++++++++++++++++++------------ 1 file changed, 85 insertions(+), 52 deletions(-) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
