Quoting ville.syrjala@xxxxxxxxxxxxxxx (2017-06-22 12:55:48) > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Bspec claims that HWSTAM is only 16 bits on gen3, but the other > interrupts registers are 32 bits and there are 18 valid interrupt > bits. Hence a 16 bit HWSTAM wouldn't be able to contain all the > bits, so it seems the spec is incorrect about the size of the > register. And indeed I can clear bits 16 and 17 just fine with > a 32 bit write. So let's adjust the code to treat the register > as 32 bits. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Acked-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
