From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Apparently we have some issues [1] on g4x which smells like irqs not getting
delivered after some point in time. The gen2-4 irq code is rather crusty
so I thought I'd bring it up to the same quality standards as the VLV/CHV
irq code. And to avoid any chances of missing the edges I changed all the
gmch platforms to use the "disable IER -> ack IIR -> enable IER" trick
we use on VLV and CHV. That should be robust with both level and edge
triggered interrupts, and single and double buffered IIR.
I think the only slightly scary bits are the ones touching HWSTAM
programming. While that's not strictly needed for this series, I really
wanted to remove a bunch of duplicat irq setup code, and for that
I wanted to make the HWSTAM programming consistent. We don't actually
use any of the interrupt information written into the status page,
but I have slight concern that the extra status page writes may have
had some unintended effect on seqno coherency. Fingers crossed...
There's potentially more unification we could do on the various gmch
interrupts functions, but as the series was already ballooning out of
control I decided not to pursue that angle very far.
I smoke tested this on 830, pnv, g4x, and ilk.
Series is available here:
git://github.com/vsyrjala/linux.git gmch_irq_redo
Ville Syrjälä (17):
drm/i915: Clear pipestat consistently
drm/i915: s/GEN3/GEN5/
drm/i915: Use GEN3_IRQ_RESET/INIT on gen3/4
drm/i915: Introduce GEN2_IRQ_RESET/INIT
drm/i915: Setup EMR first on all gen2-4
drm/i915: Eliminate PORT_HOTPLUG_EN setup from gen3/4 irq_postinstall
drm/i915: Unify the appearance of gen3/4 irq_postistall hooks
drm/i915: Remove NULL dev_priv checks from irq_uninstall
drm/i915: Mask everything in ring HWSTAM on gen6+ in ringbuffer mode
drm/i915: Gen3 HWSTAM is actually 32 bits
drm/i915: Clean up the HWSTAM mess
drm/i915: Remove duplicated irq_preinstall/uninstall hooks
drm/i915: Consolidatte intel_check_page_flip() into
intel_pipe_handle_vblank()
drm/i915: Move the gen2-4 page flip handling code around
drm/i915: Simplify the gen2-4 flip_mask handling
drm/i915: Extract PIPESTAT irq handling into separate functions
drm/i915: Rewrite GMCH irq handlers to follow the VLV/CHV pattern
drivers/gpu/drm/i915/i915_irq.c | 909 ++++++++++++++------------------
drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +
2 files changed, 394 insertions(+), 518 deletions(-)
--
2.13.0
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