Pan ruochen wrote:
The instructions are executed in order. The problem is that the write
operations in IO space are sometimes reordered. On this board, flushing the
write-back buffer after IO writes is required.
David Daney
Here, the write-back buffer means the instruction cache of MIPS?
No.
It is separate from the caches and was intended to coalesce adjacent
writes into a single wider write. It had the problem that it could end
up reordering the writes under some circumstances even through uncached
portions of the address space.
David Daney
