Pan ruochen wrote:
Hi All, It is very common to read/write hardware registers frequently when developing a hardware driver, like $cat hw.c #define HW_REG0 (volatile unsigned *)(HW_REG_BASE + 0x00) #define HW_REG1 (volatile unsigned *)(HW_REG_BASE + 0x04) ... #define HW_REGn (volatile unsigned *)(HW_REG_BASE + 0xXX) *HW_REG0 = 1; *HW_REG1 = 4; while( *HW_REG1 == 4 ); ... ... I wonder if there is any possibility that gcc reorders the read/write operations in a way it thinks more optimal, which may be a disaster to the hardware driver.
GCC shouldn't reorder the operations because you have them declared as 'volatile', however I have a MIPS CPU where the hardware writeback buffer seems to do reordering...
David Daney
