On Wednesday 03 September 2008, Pan ruochen wrote: > Hi All, > It is very common to read/write hardware registers frequently when > developing a hardware driver, like ... > I wonder if there is any possibility that gcc reorders the read/write > operations in a way it thinks more optimal, which may be a disaster to > the hardware driver. The language guarantees that any operation on a 'volatile' object is complete when a sequence point is reached and that none of the subsequent operations on that volatile object will have been taken place. This prevents the compiler from reordering volatile accesses. However, that compiler has no knowledge about the underlying memory system - the CPU may reorder writes. Preventing this is quite hardware specific and may require hardware configuration or memory barriers.
