Pan ruochen wrote:
I wonder if there is any possibility that gcc reorders the read/write operations in a way it thinks more optimal, which may be a disaster to the hardware driver.
IIRC, the C compiler is required to maintain program order. Hence, it should not re-order reads and writes. However, if you do not declare a register as volatile, the compiler might optimize away something. For example:
*HW_REG0=1; *HW_REG0=4; Might become simply: *HW_REG0=4; Rob