Pan ruochen wrote:
GCC shouldn't reorder the operations because you have them declared as
'volatile', however I have a MIPS CPU where the hardware writeback buffer
seems to do reordering...
David Daney
Can volatile do this? I thought volatile just forced GCC to read the
memory location each time rather than cahed the value in a register.
It does. The problem I described is a hardware problem and has nothing
to do with the compiler.
And I am interested in the details how your MIPS CPU hardware
reordered instructions.
The instructions are executed in order. The problem is that the write
operations in IO space are sometimes reordered. On this board, flushing
the write-back buffer after IO writes is required.
David Daney
