Re: [PATCH v5 2/6] dt-bindings: gpu: v3d: Add per-compatible register restrictions

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On Sun, Mar 16, 2025 at 11:15:09AM -0300, Maíra Canal wrote:
> In order to enforce per-SoC register rules, add per-compatible
> restrictions. V3D 3.3 (used in brcm,7268-v3d) has a cache controller
> (GCA), which is not present in other V3D generations. Declaring these
> differences helps ensure the DTB accurately reflect the hardware design.
> 
> This commit breaks the ABI for BCM7268 to enforce an ascending address

Wait, why? That's not a reason to break ABI! First, there is no rule of
ascending address order. Really no. Second, even if there was such
coding style recommendation, it would not be reason to break ABI.

This patchset is not going to right direction. Read the previous
feedbacks about what is expected.

Best regards,
Krzysztof





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