On Wed, Oct 26, 2022 at 01:50:15PM +0200, Johan Hovold wrote:
> On Tue, Oct 25, 2022 at 08:26:24PM -0700, Bjorn Andersson wrote:
> > From: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> >
> > The SA8295P ADP has, among other interfaces, six MiniDP connectors which
> > are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
> >
> > Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
> > DP PHYs and link them all together.
> >
> > Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> > Signed-off-by: Bjorn Andersson <quic_bjorande@xxxxxxxxxxx>
> > ---
>
> > &apps_rsc {
> > @@ -156,13 +240,169 @@ vreg_l7g: ldo7 {
> >
> > vreg_l8g: ldo8 {
> > regulator-name = "vreg_l8g";
> > - regulator-min-microvolt = <880000>;
> > - regulator-max-microvolt = <880000>;
> > + regulator-min-microvolt = <912000>;
> > + regulator-max-microvolt = <912000>;
> > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > + regulator-allow-set-load;
>
> Did you really intend to allow set-load here?
>
> I'm guessing this wasn't the case, but otherwise you also need to
> specify the valid modes.
>
I see no reason for keeping it at this point in time, will drop it.
Thanks,
Bjorn
> > + };
> > +
> > + vreg_l11g: ldo11 {
> > + regulator-name = "vreg_l11g";
> > + regulator-min-microvolt = <912000>;
> > + regulator-max-microvolt = <912000>;
> > regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> > };
> > };
> > };
>
> > +&mdss0_dp2_phy {
> > + status = "okay";
> > +
> > + vdda-phy-supply = <&vreg_l8g>;
> > + vdda-pll-supply = <&vreg_l3g>;
> > +};
>
> Johan
