Hi Stephen, Thanks for reviewing. On Wed, May 27, 2020 at 9:44 AM Stephen Boyd <sboyd@xxxxxxxxxx> wrote: > > Quoting dillon.minfei@xxxxxxxxx (2020-05-24 20:45:45) > > From: dillon min <dillon.minfei@xxxxxxxxx> > > > > ltdc set clock rate crashed > > 'post_div_data[]''s pll_num is PLL_I2S, PLL_SAI (number is 1,2). but, > > Please write "post_div_data[]'s" if it is possessive. "But" doesn't > start a sentence. This is one sentence, not two. Ok. > > > as pll_num is offset of 'clks[]' input to clk_register_pll_div(), which > > is FCLK, CLK_LSI, defined in 'include/dt-bindings/clock/stm32fx-clock.h' > > so, this is a null object at the register time. > > then, in ltdc's clock is_enabled(), enable(), will call to_clk_gate(). > > will return a null object, cause kernel crashed. > > need change pll_num to PLL_VCO_I2S, PLL_VCO_SAI for 'post_div_data[]' > > > > duplicated ltdc clock > > 'stm32f429_gates[]' has a member 'ltdc' register to 'clk_core', but no > > upper driver use it, ltdc driver use the lcd-tft defined in > > 'stm32f429_aux_clk[]'. after system startup, as stm32f429_gates[]'s ltdc > > enable_count is zero, so turn off by clk_disable_unused() > > I sort of follow this. Is this another patch? Seems like two things are > going on here. This patch fix two bugs about stm32's clock. bug1: ltdc driver loading hang in clk_set_rate(), this is due to misuse ‘PLL_VCO_SAI' and 'PLL_SAI'. speak in short, from the below code, ’PLL_SAI' is 2, 'PLL_VCO_SAI' is 7. 'post_div' point to 'post_div_data[]', 'post_div->pll_num' is PLL_I2S, PLL_SAI. 'clks[PLL_VCOM_SAI' has vaild 'struct clk_hw* ' return from stm32f4_rcc_register_pll() but, at line 1776, use the 'clks[post_div->pll_num]', equal to 'clks[PLL_SAI]', this is invaild at that time. include/dt-bindings/clock/stm32fx-clock.h 29 #define PLL_VCO_SAI 7 drivers/clk/clk-stm32f4.c 494 enum { 495 PLL, 496 PLL_I2S, 497 PLL_SAI, 498 }; 558 static const struct stm32f4_pll_post_div_data post_div_data[MAX_POST_DIV] = { 559 { CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q", 560 CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL}, 561 562 { CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q", 563 CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL }, 564 565 { NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT, 566 STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table }, 567 }; 1759 clks[PLL_VCO_SAI] = stm32f4_rcc_register_pll("vco_in", 1760 &data->pll_data[2], &stm32f4_clk_lock); 1761 1762 for (n = 0; n < MAX_POST_DIV; n++) { 1763 const struct stm32f4_pll_post_div_data *post_div; 1764 struct clk_hw *hw; 1765 1766 post_div = &post_div_data[n]; 1767 1768 hw = clk_register_pll_div(post_div->name, 1769 post_div->parent, 1770 post_div->flag, 1771 base + post_div->offset, 1772 post_div->shift, 1773 post_div->width, 1774 post_div->flag_div, 1775 post_div->div_table, 1776 clks[post_div->pll_num], 1777 &stm32f4_clk_lock); 1778 1779 if (post_div->idx != NO_IDX) 1780 clks[post_div->idx] = hw; 1781 } bug2: ltdc's clock turn off by clk_disable_unused() from your comments at '[PATCH v3 4/5] clk: stm32: Fix stm32f429 ltdc driver loading hang in clk set rate. keep ltdc clk running after kernel startup' , i go deep into the code, found stm32's clk driver register two gate clk to clk core by clk_hw_register_gate() and clk_hw_register_composite() first: 'stm32f429_gates[]', clk name is 'ltdc', this is no user used. second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', this is used by ltdc driver both of them point to the same offset of stm32's RCC register. after kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' is unused. but, actually 'stm32f429_aux_clk[]' is in use. i can separate this patch to two, each bug a patch if necessary > > > > > Changes since V3: > > 1 drop last wrong changes about 'CLK_IGNORE_UNUSED' patch > > 2 fix PLL_SAI mismatch with PLL_VCO_SAI > > This change log goes under the --- below. ok > > > > > Signed-off-by: dillon min <dillon.minfei@xxxxxxxxx> > > Any Fixes tag? ok, will add --fixup in git commit next time, this patch fix two bugs, i should make two commit, each one has a fixes tag, right? first point to '517633e clk: stm32f4: Add post divisor for I2S & SAI PLLs' second point to 'daf2d11 clk: stm32f4: Add lcd-tft clock' _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel