RE: [PATCH 1/4] dma: fsl-qdma: add qDMA Command queue mode driver

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Hi Wen,

<Snip>
>> Not sure whether it is useful or not.
>> To differentiate b/w big-endian and little endian you can read a
>> register and based on that You can differentiate sub sequent writes/reads in the
>driver.
>>
>> For your reference
>> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Feli
>> xir
>> .free-electrons.com%2Flinux%2Flatest%2Fsource%2Fdrivers%2Fnet%2Fcan%
>> 2Fxilinx_can.c%23L1156&data=02%7C01%7Cwen.he_1%40nxp.com%7Ca251
>> 456a259248ad0d3408d5487b2257%7C686ea1d3bc2b4c6fa92cd99c5c30163
>> 5%7C0%7C0%7C636494616067137548&sdata=v8%2B%2BOJPvMhM3rM21%
>> 2FgaYIM%2Fxp8XlEnMweQhev2iRbrk%3D&reserved=0
>>
>
>This endian mode is not CPU endian mode, is IP(qdma) Module endian mode.
>For now NXP QorIQ Layerscape Processors including 13 socs, same IP on different
>soc has may be different endian-mode.
>
>fsl_qdma->feature = of_property_read_bool(np, "big-endian");
>
>In above, IP endian-mode defined in dts file, fsl_qdma_probe() need read dts
>node be used for getting IP endian mode.
>
>So, Maybe I can't follow your reference.
>
>For your reference
>https://elixir.free-
>electrons.com/linux/latest/source/arch/arm64/boot/dts/freescale/fsl-
>ls1043a.dtsi

Got it thanks for the clarification... 

Regards,
Kedar.

>
>Regards,
>Wen
>
>> Regards,
>> Kedar.
>>
>> >Best Regards,
>> >Wen
>> >
>> >> --
>> >> ~Vinod
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>> m%7C74567b527be2494f807008d547c47ce9%7C686ea1d3bc2b4c6fa92cd99
>> >>
>> c5c301635%7C0%7C0%7C636493831608931495&sdata=0nw8F8Vpcszm5WS
>> >> ixNlv2PsonEJu1ippSVwyARvwzLM%3D&reserved=0
>> >韬{.n?壏煯壄?%娝lzwm呴b濍Р骒r笡y贇zx"濊Ф洝塄}财爖?j:+v
>> 墾?珣赙
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