RE: [PATCH 1/4] dma: fsl-qdma: add qDMA Command queue mode driver

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Hi,

	Thanks for the patch.. .
<Snip>
>> > > Ah that would be duplicate. How about making it common and
>> > > abstracting this as FSL_DMA_IN/OUT and using in both drivers?
>> >
>> > OK, but for now we are on rush to let this merged. Could we apply
>> > current version fist, then I will discuss with author of that macro
>> > to get it
>> done? Thank you.
>>
>> Am really sorry but that is not how upstreaming works. We dont do this
>> and we certainly don't rush.
>>
>
>Okay, got it. through discuss with author, I know the fsldma.c is early freescale
>powerpc Socs driver and DMA_IN/OUT used.
>So I want will and below defined FSL_DMA_IN/OUT instead DMA_IN/OUT in
>fsldma.h and using in both drivers.
>Is that ok?
>
>#ifdef CONFIG_PPC
>static void ioread32(const u32 __iomem *addr) {
>        return in_le32(addr);
>}
>
>static void iowrite32(u32 __iomem *addr, u32 val) {
>        out_le32(addr, val);
>}
>
>static void ioread32be(const u32 __iomem *addr) {
>        return in_be32(addr);
>}
>
>static void iowrite32be(u32 __iomem *addr, u32 val) {
>        out_be32(addr, val);
>}
>#endif
>
>#define FSL_DMA_IN(fsl_dma, addr, width)                                \
>                (((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ?            \
>                        ioread##width##be(addr) : ioread##width(addr))
>
>#define FSL_DMA_OUT(fsl_dma, addr, val, width)                          \
>                (((fsl_dma)->feature & FSL_DMA_BIG_ENDIAN) ?            \
>                        iowrite##width##be(val, addr) : iowrite##width(val, addr))
>

Not sure whether it is useful or not.
To differentiate b/w big-endian and little endian you can read a register and based on that
You can differentiate sub sequent writes/reads in the driver.

For your reference 
https://elixir.free-electrons.com/linux/latest/source/drivers/net/can/xilinx_can.c#L1156 

Regards,
Kedar.

>Best Regards,
>Wen
>
>> --
>> ~Vinod
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