Re: PCIe dmaengine driver on both x86 and ARM64

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On Fri, Nov 18, 2016 at 08:33:58AM +0000, Bharat Kumar Gogada wrote:
> > > > > >
> > > > > Thanks vinod.
> > > > >
> > > > > We have  a scenario where DMA client driver needs to access PCI
> > > > > bars of end point, but the DMA core driver is the one which has
> > > > > access to pcie resources. Is there any way we can pass this bar
> > > > > information to client driver through DMA framework ?
> > > > Is the BAR a dma transaction address (src/dstn) or a resource for
> > > > the DMA controller?
> > > >
> > > It is end point specific logic that is mapped to other bars (One bar
> > > will be as dma resource), these can be IP specific registers like
> > > statistics, so how can the client driver have access these resources ?
> > 
> > So if you are ACPI device then this should be an ACPI resource...
> > 
> > This is not dmaengine API issue...
> > 
> Thanks Vinod. 
> 
> We are planning to pass bar details to client driver using private pointer in
> dma_chan using either of the following:
> 1. By passing a structure with required bar physical addresses. 
> 2. By providing read/write function pointers to specific bar & offset (The functions will take care 
> not to access dma channel specific locations used by dma core driver)
> 
> I want to know whether these are acceptable or not. 

Sound like a HACK to me :(

Can you describe your hardware again please. Also why not create a MFD
devices with dmaengine driver and clientand you can setup resources
accordingly..

-- 
~Vinod
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