On 10:22-20240619, Dhruva Gole wrote: > Hi Nishanth, > > On Jun 18, 2024 at 12:31:21 -0500, Nishanth Menon wrote: > > Introduce a GPIO mux mode macro for easier readability. All K3 devices > > use mux mode 7 to switch to GPIO mux. > > > > Signed-off-by: Nishanth Menon <nm@xxxxxx> > > --- > > arch/arm64/boot/dts/ti/k3-pinctrl.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h > > index 4cd2df467d0b..b1a0415e6611 100644 > > --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h > > +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h > > @@ -38,6 +38,8 @@ > > #define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT) > > #define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT) > > > > +#define PIN_GPIO_MUX_MODE (7) > > + > > While I do agree that this is a standard thing, don't you think that > updating it everywhere else (k3 DTs) makes sense? Having the number 7 in some > places and others having PIN_GPIO_MUX_MODE will give rise to confusion I > feel. > Yes, thinking again, we will repeat using this for other SoCs as well for gpio-ranges. I think it might be better if we did this instead: /* Default mux configuration for gpio-ranges use with pinctrl */ #define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7) * Clears up the understanding what the define is for. * Consistent usage across K3 SoCs. * Prevents mis-understanding where to use the macro. Thoughts? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
