Hello, This series adds device-tree support for PCIe and USB on J722S SoC. This series is the v3 for the v2 USB series at: https://lore.kernel.org/r/20240513114443.16350-1-r-gunasekaran@xxxxxx/ and is also the v1 series for enabling PCIe device-tree support for J722S. Since the v2 USB series combined portions of the PCIe changes incorrectly, I have updated this series to contain USB specific changes in the first 3 patches of this series while moving the PCIe specific changes to the remaining 4 patches in this series. Series is based on linux-next tagged next-20240524. v2 for USB: https://lore.kernel.org/r/20240513114443.16350-1-r-gunasekaran@xxxxxx/ Changes since v2 USB series: - For patch 1: => Renamed serdes0_ln_ctrl to serdes_ln_ctrl to keep the format consistent across SoCs where a single node is sufficient to represent the Lane-Muxing for all instances of the Serdes. - For patch 2: => No changes since v2. - For patch 3: => Renamed serdes0_ln_ctrl to serdes_ln_ctrl corresponding to the change made in patch 1. => Dropped Serdes1 idle-states since it has not yet been added in the serdes_ln_ctrl node. => Dropped Serdes1 specific Lane-Muxing macros in "k3-serdes.h". => Added newline after /* J722S */ in "k3-serdes.h" following the file convention. v1 for USB: https://lore.kernel.org/r/20240429120932.11456-1-r-gunasekaran@xxxxxx/ Changes since v1 USB series: - Introduced k3-j722s-main.dtsi newly to add the main domain peripherals that are present additionally in J722S as suggested by Andrew Davis. - Used generic node names as suggested by Roger Quadros. - Removed the aliases for usb as suggested by Rob Herring. This series has no dependencies and has been tested on J722S-EVM. Logs testing PCIe functionality with an NVMe SSD connected to the J722S-EVM and testing USB functionality limited to "lsusb" output: https://gist.github.com/Siddharth-Vadapalli-at-TI/6a9cdcec24add0114e63db736b3e23fb Regards, Siddharth. Ravi Gunasekaran (3): arm64: dts: ti: k3-j722s-main: Add support for SERDES0 arm64: dts: ti: k3-j722s-main: Redefine USB1 node description arm64: dts: ti: k3-j722s-evm: Update USB0 and USB1 Siddharth Vadapalli (4): arm64: dts: ti: k3-serdes: Add Serdes1 lane-muxing macros for J722S arm64: dts: ti: k3-j722s: Add lane mux for Serdes1 arm64: dts: ti: k3-j722s-main: Add WIZ1 and Serdes1 nodes arm64: dts: ti: k3-j722s: Add support for PCIe0 arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 72 +++++++++ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 177 ++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 5 + arch/arm64/boot/dts/ti/k3-serdes.h | 8 + 4 files changed, 262 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi -- 2.40.1
