On Wed, Feb 21, 2024 at 03:24:07PM +0000, Diogo Ivo wrote: > Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG > support: Only 2 PRUs per slice are available and instead 2 additional > DMA channels are used for management purposes. We have no restrictions > on specified PRUs, but the DMA channels need to be adjusted. > > Co-developed-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx> > Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx> > Signed-off-by: Diogo Ivo <diogo.ivo@xxxxxxxxxxx> Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Cheers, Conor.
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