On 21/02/2024 17:24, Diogo Ivo wrote: > Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG > support: Only 2 PRUs per slice are available and instead 2 additional > DMA channels are used for management purposes. We have no restrictions > on specified PRUs, but the DMA channels need to be adjusted. > > Co-developed-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx> > Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx> > Signed-off-by: Diogo Ivo <diogo.ivo@xxxxxxxxxxx> Reviewed-by: Roger Quadros <rogerq@xxxxxxxxxx> -- cheers, -roger
