Hi, Am Montag, 29. Januar 2024, 18:17:37 CET schrieb Frank Li: > On Tue, Dec 19, 2023 at 01:34:39PM +0100, Alexander Stein wrote: > > Bindings say DMA channels are in order Rx, Tx. Adjust the DT nodes > > accordingly. > > > > Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx> > > --- > > > > arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > > b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index > > a180893ac81e..0f48796e32b2 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi > > @@ -93,8 +93,8 @@ lpuart0: serial@5a060000 { > > > > assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>; > > assigned-clock-rates = <80000000>; > > power-domains = <&pd IMX_SC_R_UART_0>; > > > > - dma-names = "tx","rx"; > > - dmas = <&edma2 9 0 0>, <&edma2 8 0 1>; > > + dma-names = "rx", "tx"; > > + dmas = <&edma2 8 0 0>, <&edma2 9 0 1>; > > edma device bind header file already merged. > Please include <dt-binding/dma/fsl-edma.h> > > Change "1" to "FSL_EDMA_RX". Thanks, I was not aware of that change. Meanwhile I noticed in my patch the flags were not switched as well. Best regards, Alexander > Frank > > > status = "disabled"; > > > > }; > > > > @@ -107,8 +107,8 @@ lpuart1: serial@5a070000 { > > > > assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>; > > assigned-clock-rates = <80000000>; > > power-domains = <&pd IMX_SC_R_UART_1>; > > > > - dma-names = "tx","rx"; > > - dmas = <&edma2 11 0 0>, <&edma2 10 0 1>; > > + dma-names = "rx", "tx"; > > + dmas = <&edma2 10 0 0>, <&edma2 11 0 1>; > > > > status = "disabled"; > > > > }; > > > > @@ -121,8 +121,8 @@ lpuart2: serial@5a080000 { > > > > assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>; > > assigned-clock-rates = <80000000>; > > power-domains = <&pd IMX_SC_R_UART_2>; > > > > - dma-names = "tx","rx"; > > - dmas = <&edma2 13 0 0>, <&edma2 12 0 1>; > > + dma-names = "rx", "tx"; > > + dmas = <&edma2 12 0 0>, <&edma2 13 0 1>; > > > > status = "disabled"; > > > > }; > > > > @@ -135,8 +135,8 @@ lpuart3: serial@5a090000 { > > > > assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>; > > assigned-clock-rates = <80000000>; > > power-domains = <&pd IMX_SC_R_UART_3>; > > > > - dma-names = "tx","rx"; > > - dmas = <&edma2 15 0 0>, <&edma2 14 0 1>; > > + dma-names = "rx", "tx"; > > + dmas = <&edma2 14 0 0>, <&edma2 15 0 1>; > > > > status = "disabled"; > > > > }; -- TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany Amtsgericht München, HRB 105018 Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider http://www.tq-group.com/