On Fri, Jul 28, 2023 at 5:39 PM Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > On 28/07/2023 11:04, Eric Lin wrote: > > On Fri, Jul 28, 2023 at 2:58 PM Krzysztof Kozlowski > > <krzysztof.kozlowski@xxxxxxxxxx> wrote: > >> > >> On 28/07/2023 08:01, Eric Lin wrote: > >>> Hi Krzysztof, > >>> > >>> On Fri, Jul 21, 2023 at 4:35 PM Krzysztof Kozlowski > >>> <krzysztof.kozlowski@xxxxxxxxxx> wrote: > >>>> > >>>> On 20/07/2023 15:51, Eric Lin wrote: > >>>>> This add YAML DT binding documentation for SiFive Private L2 > >>>>> cache controller > >>>>> > >>>>> Signed-off-by: Eric Lin <eric.lin@xxxxxxxxxx> > >>>>> Reviewed-by: Zong Li <zong.li@xxxxxxxxxx> > >>>>> Reviewed-by: Nick Hu <nick.hu@xxxxxxxxxx> > >>>> > >>>> > >>>> ... > >>>> > >>>>> +properties: > >>>>> + compatible: > >>>>> + items: > >>>>> + - const: sifive,pl2cache1 > >>>> > >>>> I still have doubts that it is not used in any SoC. This is what you > >>>> said last time: "is not part of any SoC." > >>>> If not part of any SoC, then where is it? Why are you adding it to the > >>>> kernel? > >>>> > >>> > >>> Sorry for the late reply. I didn't describe it clearly last time. > >>> Currently, we have two hardware versions of pl2cache: pl2cache0 and pl2cache1. > >>> The pl2cache0 is used in unmatched board SoC. The pl2cache1 is > >>> utilized in our internal FPGA platform for evaluation; it's our core > >>> IP. > >> > >> And why do you add bindings for some internal FPGA IP block which does > >> not interface with any SW? > >> > > > > Hi Krzysztof, > > The pl2cache has mmio interface for SW. Thanks. > > Then did you mean that FPGA represented some model of your SoC? If so, > what are other bindings for that FPGA components? > Hi Krzysztof, Sorry for the late reply. Yes, here are the devices dt-binding that we use on the internal FPGA SoC platform. Thanks. uart: Documentation/devicetree/bindings/serial/sifive-serial.yaml gpio: Documentation/devicetree/bindings/gpio/sifive,gpio.yaml dma: Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml spi: Documentation/devicetree/bindings/spi/spi-sifive.yaml Best regards, Eric Lin > Best regards, > Krzysztof >
