Il 21/12/22 04:44, Allen-KH Cheng ha scritto:
The "mediatek,mt8192-scp_adsp" binding requires a power domain to be
specified.
Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock")
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx>
---
.../arm/mediatek/mediatek,mt8192-clock.yaml | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
index b57cc2e69efb..ce8dd2bfb533 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
@@ -40,6 +40,9 @@ properties:
reg:
maxItems: 1
+ power-domains:
+ maxItems: 1
+
'#clock-cells':
const: 1
@@ -47,13 +50,27 @@ required:
- compatible
- reg
+allOf:
allOf is unnecessary here.
Regards,
Angelo