On Wed, Dec 21, 2022 at 4:18 PM Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > On 21/12/2022 04:44, Allen-KH Cheng wrote: > > The "mediatek,mt8192-scp_adsp" binding requires a power domain to be > > specified. > > That's not true. Before this patch, how does the binding require a power > domain? Please show me the part of binding which requires it. Maybe this should be reworded to something like the following? <--- cut The SCP_ADSP clock controller has a power domain dependency that was not described properly. Add it to the binding. <--- cut This was discovered when I was reworking the clock drivers. The clocks in this controller were being turned off by the clock core, which would result in the system locking up. MediaTek said this was due to the power domain. Regards ChenYu
