The "mediatek,mt8192-scp_adsp" binding requires a power domain to be specified. Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock") Signed-off-by: Allen-KH Cheng <allen-kh.cheng@xxxxxxxxxxxx> --- .../arm/mediatek/mediatek,mt8192-clock.yaml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml index b57cc2e69efb..ce8dd2bfb533 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml @@ -40,6 +40,9 @@ properties: reg: maxItems: 1 + power-domains: + maxItems: 1 + '#clock-cells': const: 1 @@ -47,13 +50,27 @@ required: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + enum: + - mediatek,mt8192-scp_adsp + then: + required: + - power-domains + additionalProperties: false examples: - | + #include <dt-bindings/power/mt8192-power.h> + scp_adsp: clock-controller@10720000 { compatible = "mediatek,mt8192-scp_adsp"; reg = <0x10720000 0x1000>; + power-domains = <&spm MT8192_POWER_DOMAIN_ADSP>; #clock-cells = <1>; }; -- 2.18.0