RE: [PATCH 5/5] arm64: dts: renesas: r8a779f0: spider: Enable Ethernet Switch

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Hi Andrew,

> From: Andrew Lunn, Sent: Wednesday, September 14, 2022 9:14 PM
> 
> > > > +		port@2 {
> > > > +			reg = <2>;
> > > > +			phy-handle = <&etha2>;
> > > > +			phy-mode = "sgmii";
> > > > +			#address-cells = <1>;
> > > > +			#size-cells = <0>;
> > > > +			etha2: ethernet-phy@2 {
> > > > +				reg = <3>;
> > > > +				compatible = "ethernet-phy-ieee802.3-c45";
> > > > +			};
> > > > +		};
> > >
> > > I find it interesting you have PHYs are address 1, 2, 3, even though
> > > they are on individual busses. Why pay for the extra pullup/down
> > > resistors when they could all have the same address?
> >
> > I don't know why. But, the board really configured such PHY addresses...
> 
> That is not wrong. It could be the hardware engineer is used to shared
> MDIO busses, and just copy/pasted an existing design, but then
> separated the busses?

It's possible.

> You might see actual customer boards putting all the PHYs on one MDIO
> bus, to save pins. Linux has no problem with that, the phy-handle can
> point anywhere.

I see.

> One last thought. Is there anything in the data sheet about the switch
> hardware directly talking the PHY?

Yes, the switch hardware can talk the PHY directly.

> Some of the Marvell switches can do
> that, but we disable that feature. The hardware has no idea what the
> PHY driver is doing, such as selecting different pages.

That's interesting.

Best regards,
Yoshihiro Shimoda





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