On 10/08/2022 11:59, Conor Dooley wrote: > The "hard" QSPI peripheral on PolarFire SoC is derived from version 2 > of the FPGA IP core. The original binding had no fallback etc, so this > device tree is valid as is. There was also no functional driver for the > QSPI IP, so no device with a devicetree from a previous mainline > release will regress. > > Link: https://lore.kernel.org/linux-spi/7c9f0d96-2882-964a-cd1f-916ddb3f0410@xxxxxxxxxx/ > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > --- > See the link for binding discussion. I'll apply this at some point once Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
