On 2022/4/19 下午 06:39, Krzysztof Kozlowski wrote:
On 19/04/2022 12:12, Jacky Huang wrote:
+
+ assigned-clock-rates:
+ minItems: 5
+ maxItems: 5
+
+ nuvoton,clk-pll-mode:
+ A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
+ and VPLL in sequential.
This does not look like a binding which was tested. Read
"writing-schema" and test your bindings.
"nuvoton,clk-pll-mode" is a nonstandard property used to describe the
operation mode of
corresponding PLLs.
(According to Device tree Specification section "2.2.4 Properties"
Nonstandard property names should specify a unique string prefix, such
as a stock ticker symbol, identifying the name of
the company or organization that defined the property. Examples:
I am not saying about property name. I replied under some description
below which fails to build.
Instead please test your bindings.
Best regards,
Krzysztof
OK, I got it. I found the error by dt_binding_check.
I will fix them in the next version.
Thank you very much.
Jacky Huang
