Re: [PATCH v3 2/5] dt-bindings: clock: Document MA35D1 clock controller bindings

[Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>]

On 18/04/2022 10:27, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
> 

You skipped the review tag, so I assume because of amount of changes.
Usually it is nice to mention it...

> Signed-off-by: Jacky Huang <ychuang3@xxxxxxxxxxx>
> ---
>  .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 63 +++++++++++++++++++
>  1 file changed, 63 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..d0d37c5e84af
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> +  - Chi-Fang Li <cfli0@xxxxxxxxxxx>
> +  - Jacky Huang <ychuang3@xxxxxxxxxxx>
> +
> +description: |
> +  The MA35D1 clock controller generates clocks for the whole chip,
> +  including system clocks and all peripheral clocks.
> +
> +  See also:
> +    include/dt-bindings/clock/ma35d1-clk.h
> +
> +properties:
> +  compatible:
> +    const: nuvoton,ma35d1-clk
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  assigned-clocks:

What about clocks? This depends on clocks. What clocks do you want to
assign if they are not an input to the device?

> +    minItems: 5
> +    maxItems: 5

This is different than before. minItems should not be here.

Why do you need assigned-clocks in the binding at all?

> +
> +  assigned-clock-rates:
> +    minItems: 5
> +    maxItems: 5
> +
> +  nuvoton,clk-pll-mode:
> +    A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL,
> +    and VPLL in sequential.

This does not look like a binding which was tested. Read
"writing-schema" and test your bindings.

> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    minItems: 5

No need for minItems.

> +    maxItems: 5
> +    items:
> +      enum: [ 0, 1, 2 ]

You need to describe the values in description, what's their meaning.
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> +    clk: clock-controller@40460200 {
> +        compatible = "nuvoton,ma35d1-clk";
> +        reg = <0x0 0x40460200 0x0 0x100>;
> +        #clock-cells = <1>;
> +    };
> +...


Best regards,
Krzysztof