Re: [PATCHv3 1/2] dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"

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On 16/12/21 04:49PM, Dinh Nguyen wrote:
> The QSPI controller on Intel's SoCFPGA platform does not implement the
> CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register
> results in a crash.
> 
> Introduce the dts compatible "intel,socfpga-qspi" to differentiate the
> hardware.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx>

Acked-by: Pratyush Yadav <p.yadav@xxxxxx>

-- 
Regards,
Pratyush Yadav
Texas Instruments Inc.



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