On Thu, 16 Dec 2021 16:49:01 -0600, Dinh Nguyen wrote: > The QSPI controller on Intel's SoCFPGA platform does not implement the > CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register > results in a crash. > > Introduce the dts compatible "intel,socfpga-qspi" to differentiate the > hardware. > > Signed-off-by: Dinh Nguyen <dinguyen@xxxxxxxxxx> > --- > v3: revert to "intel,socfpga-qspi" > v2: change binding to "cdns,qspi-nor-0010" to be more generic for other > platforms > --- > Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
