On Thu, 9 Apr 2009 12:16:55 +0200 "Ujfalusi Peter (Nokia-D/Tampere)" <peter.ujfalusi@xxxxxxxxx> wrote: > > Are you absolutely sure on this? According to WM9713, it's the DSP_A > > where MSB is valid after 1 bit clock period of the FS. > > I think this is correct. The data is going to be valid exactly the > same way, as the WM9713 data sheet describes. > > As for the DSP_B mode: I think it can be implemented like this: > Invert the frame sync polarity, Then: > case SND_SOC_DAIFMT_DSP_B: > regs->srgr2 |= FPER(wlen * channels - 1); > regs->srgr1 |= FWID(0); /* FS pulse width is 1 > */ break; > > So the MSB will be in the correct place. > Peter is right. There is a bug in omap-mcbsp.c. If I play maximum negative samples "aplay -f U8 /dev/zero", the MSB bit is then just after the falling edge of FS like in DSP_A format... (hmm, what I was doing in the commit bd25867a6cbe7a00ef7dbe8d9ddebc91b00b9b3f). Is it ok to leave this over the easter to make sure next week that we'll get this finally right? I have had already few DSP format fixes there and still this is not correct... :-) -- Jarkko _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel