On Thu, 9 Apr 2009 11:34:41 +0200 "Ujfalusi Peter (Nokia-D/Tampere)" <peter.ujfalusi@xxxxxxxxx> wrote: > - case SND_SOC_DAIFMT_DSP_B: > + case SND_SOC_DAIFMT_DSP_A: > /* 0-bit data delay */ > regs->rcr2 |= RDATDLY(0); > regs->xcr2 |= XDATDLY(0); > -- Are you absolutely sure on this? According to WM9713, it's the DSP_A where MSB is valid after 1 bit clock period of the FS. -- Jarkko _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
