On Thu, 9 Apr 2009 12:16:55 +0200 "Ujfalusi Peter (Nokia-D/Tampere)" <peter.ujfalusi@xxxxxxxxx> wrote: > > Are you absolutely sure on this? According to WM9713, it's the DSP_A > > where MSB is valid after 1 bit clock period of the FS. > > I think this is correct. The data is going to be valid exactly the > same way, as the WM9713 data sheet describes. > I'll try to find working commit where my Beagle is still booting since it wasn't with the head of linux-omap and then playing a bit with McBSP3 which is available in pin header of the Beagle so we can measure this out easily. > As for the DSP_B mode: I think it can be implemented like this: > Invert the frame sync polarity, Then: > case SND_SOC_DAIFMT_DSP_B: > regs->srgr2 |= FPER(wlen * channels - 1); > regs->srgr1 |= FWID(0); /* FS pulse width is 1 Looks nice idea. BTW, I had temporary inversion in use in the commit da6320becf31c40b60d4b1dc6b339c9a766b671c. Jarkko _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
