On Wed, Nov 27, 2019 at 06:10:00PM +0000, Adam Thomson wrote: > On 27 November 2019 16:41, Mark Brown wrote: > > The PLL configuration specifies both input and output clock rates (as > > well as an input clock source) so if it's got to configure the MCLK I'd > > expect the driver to figure that out without needing the caller to > > separately set the MCLK rate. > Yes it does but the name of the function implies it's setting the codec's PLL, > not the system clock, whereas the other function implies setting the system > clock and not the PLL. Also generally you're only setting the sysclk once > whereas you may want to configure and enable/disable the PLL more dynamically, > at least for devices which do have a built-in PLL. Of course that could still be > handled through the single PLL function call. I wouldn't be so sure about only setting the SYSCLK once - if you've got an input clock you can configure then you might for example want to switch between 44.1kHz and 48kHz bases, and disable it or run it at very low frequency when idle. In some systems it's as dynamic as a PLL is. > Just as an informational, what's the future for these two functions if > essentially one is only really required and the other deemed redundant? I would > just like to be clear so I'm not falling over things like this in the future, > and wasting your time as well. Seems that the PLL call isn't part of simple > generic card code so would the be deemed surplus to requirements some point down > the line? Things like simple-card are good for 90% of systems but I'm fairly sure we'll never be able to handle more complex setups entirely automatically. What we *should* be doing over time is transitioning all this clock stuff into the actual clock framework but that's a big, long term thing which nobody is currently actually working on.
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