Hi Marco,
On 02.10.19 10:34, Marco Felsch wrote:
Hi Stefan,
On 19-10-02 09:34, Stefan Riedmüller wrote:
Hi Marco, Sascha,
On 02.10.19 09:23, Sascha Hauer wrote:
Marco,
On Wed, Oct 02, 2019 at 09:20:43AM +0200, Sascha Hauer wrote:
+Cc Christian Hemp who is the author of b6bebb7aca
On Wed, Sep 11, 2019 at 04:53:28PM +0200, Marco Felsch wrote:
The PMIC is connected to i2c3 and not i2c1.
Fixes: b6bebb7aca ("ARM: i.MX: phytec-som-imx6: phycore: Set BUCK mode to SYNC")
Signed-off-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx>
---
arch/arm/boards/phytec-som-imx6/board.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index 730115702b..38e5ede91a 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -117,7 +117,7 @@ static int phycore_da9062_setup_buck_mode(void)
struct i2c_adapter *adapter = NULL;
struct i2c_client client;
unsigned char value;
- int bus = 0;
+ int bus = 2;
int ret;
adapter = i2c_get_adapter(bus);
You could test it directly on b6bebb7aca instead of master. Is this
change necessary there aswell or has the bus numbering changed in
between?
this bus numbering changed with Marco's patch to use the upstream device tree.
ARM: dts: imx6: phycore: make use of upstream dts
The phyCORE-i.MX 6 uses just one i2c interface but on the phyBOARD-Mira two
more i2c interfaces are used.
Or if another baseboard uses the SoM and a Baseboard with more i2c interfaces.
After talking with Sascha we should fix this by using
of_find_i2c_adapter_by_node(). So it is fixed in my case and in your
case too. Are you agree?
Yes I like that!
Regards,
Stefan
Regards,
Marco
Stefan
Sascha
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