On 11/13/2014 07:44 PM, Uwe Kleine-König wrote:
On Thu, Nov 13, 2014 at 12:31:08PM +0100, Sebastian Hesselbarth wrote:
$ scripts/kwboot -b ../barebox-globalscale-mirabox.img -t /dev/ttyUSB1
Sending boot message. Please reboot the target...\
Sending boot image...
0 % [......................................................................]
5 % [......................................................................]
10 % [......................................................................]
14 % [......................................................................]
19 % [......................................................................]
24 % [.................................DDR3 Training Sequence - Ver 2.1.6
DDR3 Training Sequence - Number of DIMMs detected: 1
+xmodem: Connection timed out
That indeed is strange and indicates some general problem. Can you retry
with setting the baudrate to 115200 (-b 115200 IIRC).
Doesn't change anything. In fact the tty is already configured for
115200 Baud. And I would expect that on a mismatch it wouldn't always
die just after the header is uploaded.
Just noticed that my binary.0 was corrupted as I extraced it from a nand
dump that also included the oob area ...
With a proper image I get barebox up now.
Great, does that help with the ethernet issues you have been seeing
before?
And funny enough, during testing I added
select(fd + 1, &rfds, NULL, NULL, &tv);
to kwboot_tty_recv after the read, this results reproduibly into a
single NAK and "BootROM: Invalid header checksum".
This is still not explained. I would have expected that this select
doesn't do anything noticable on the remote end.
I cannot tell where you added that select nor can I tell why it breaks
uart boot mode. If you modifiy the code, I admit, you'll have to find
out yourself why it breaks.
Remember that the uart boot mode it neither well documented nor well
suited for "defined timings".. you'll have to hit some timing windows
otherwise it will fail.
When booting from nand (as shipped by Netgear) the output starts with:
You need to set boot source byte to UART (0x52 IIRC). Otherwise the NAND
Just for the log: UART = 0x69.
Right.
Sebastian
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