On 11/13/2014 10:09 AM, Uwe Kleine-König wrote:
On Wed, Nov 12, 2014 at 12:22:22PM +0100, Sebastian Hesselbarth wrote:
On 11/12/2014 11:56 AM, Uwe Kleine-König wrote:
Hello again,
here come the recent insights.
[...]
It seems to be not possible to easily dump the register space in both
U-Boot and barebox for comparison. md 0xf1074000+0x4000 just hangs
somewhere in the middle.
A difference between U-Boot and barebox is the location where the
internal registers are mapped. Maybe something that depends on U-Boot's
memory layout leaks into barebox because I do 2nd stage booting?
Out of ideas at the moment. :-(
Uwe,
Nice comparison, but did you double check caches are disabled? There is
no support for Dcache on mvebu SoCs in barebox atm.
I would expect that U-Boot disables caches on go. But I remember there
was a bug in that area some time ago.
Why should U-Boot do anything on go except jumping to that location?
Now I saw a different behaviour:
Let's start from scratch and change one thing at a time:
Can you try to UART boot barebox directly and try both eth interfaces?
If that already does not work we have to look at barebox only.
Sebastian
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