Hello everyone, I am trying to use barebox on a SabreSD board with i.MX6Q processor and seem to be running into problems. One odd thing that I noticed was that default configuration, freescale-mx6-sabresd_defconfig, specifies TEXT_BASE as 0x08f80000, which is the address mapped to external interface module(EIM). At the same time load address specified in arch/arm/boards/freescale-mx6-sabresd/lash-header-mx6-sabresd.imxcfg is 0x10000000, which is the start of DRAM. Is there some MMU setup that accounts for that, that I am missing? Thank you, Andrey Smirnov _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
