Hi Matteo,
Thanks for your patch. Can you resend it directly while not through
attachment?
When you resend, you can add my acked-by.
Best Regards,
Bo Shen
On 05/29/2014 01:16 AM, Matteo Fortini wrote:
As stated in section 29.19.32 of SAMA5D3 Series datasheet, to move
from CS(n) to CS(n+1) the stride is 0x14 and not 0x10.
For this reason, I was unable to use the NAND memory on my board (CS
configuration was not applied and the timings were wrong).
This patch fixes the problem.
Matteo
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