Hi, I'm posting 3 patches: - the first one fixes a problem with XScale processors. They don't support "clean + invalidate data cache entry" operation, we must use separate "clean" and "invalidate". - the second patch implements "alternate" memory layout, in which the code+data+bss appears first in memory space, then the malloc space follows (and then stack). This is required to support large malloc space (as large as possible) on systems with variable amount of RAM. - the third patch does IXP4xx (CPU support) + Goramo MultiLink platform. I can obviously split it if needed but perhaps it can go in in one piece. Against "next" branch, tested with regular 2013.03.0. -- Krzysztof Halasa _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
