On Tue, Mar 19, 2013 at 10:21:58AM +0100, Steffen Trumtrar wrote:
> This adds support for the clocktree on zynq7000 SoCs.
> The patch is based on clocks.c from the larger patch
> ARM: zynq: add suppport for Zynq 7000 SoC
> by Josh Cartwright.
>
> The driver in that patch is converted to a platform_driver and code to
> enable plls was added.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> ---
[..]
> +
> +static int zynq_clock_probe(struct device_d *dev)
> +{
> + void __iomem *slcr_base;
> + unsigned long ps_clk_rate = 33333330;
My version of the patchset had this ^ configurable, since it's possible
a different osc could be used on the board. Any reason why you've
hardcoded this instead?
Josh
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