[PATCH 4/4] create a common ARM flush_icache function

[Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>]

Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
---
 arch/arm/cpu/start-pbl.c     |    7 +++----
 arch/arm/cpu/start.c         |    4 ++--
 arch/arm/include/asm/cache.h |    9 +++++++++
 3 files changed, 14 insertions(+), 6 deletions(-)
 create mode 100644 arch/arm/include/asm/cache.h

diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c
index 1b67e2a..3f2eb07 100644
--- a/arch/arm/cpu/start-pbl.c
+++ b/arch/arm/cpu/start-pbl.c
@@ -29,6 +29,7 @@
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
 #include <asm/pgtable.h>
+#include <asm/cache.h>
 
 #include "mmu.h"
 
@@ -113,8 +114,7 @@ static void barebox_uncompress(void *compressed_start, unsigned int len)
 	if (use_mmu)
 		mmu_disable();
 
-	/* flush I-cache before jumping to the uncompressed binary */
-	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+	flush_icache();
 
 	barebox();
 }
@@ -173,8 +173,7 @@ copy_link:
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
-	/* flush I-cache before jumping to the copied binary */
-	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+	flush_icache();
 
 	r = (unsigned int)&barebox_uncompress;
 	/* call barebox_uncompress with its absolute address */
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 8365a75..07e7dfe 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -26,6 +26,7 @@
 #include <asm/barebox-arm-head.h>
 #include <asm-generic/memory_layout.h>
 #include <asm/sections.h>
+#include <asm/cache.h>
 
 #ifdef CONFIG_PBL_IMAGE
 /*
@@ -80,8 +81,7 @@ void __naked __section(.text_ll_return) board_init_lowlevel_return(void)
 	/* clear bss */
 	memset(__bss_start, 0, __bss_stop - __bss_start);
 
-	/* flush I-cache before jumping to the copied binary */
-	__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+	flush_icache();
 
 	/* call start_barebox with its absolute address */
 	r = (unsigned int)&start_barebox;
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
new file mode 100644
index 0000000..ff79749
--- /dev/null
+++ b/arch/arm/include/asm/cache.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_CACHE_H
+#define __ASM_CACHE_H
+
+static inline void flush_icache(void)
+{
+	asm volatile("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+}
+
+#endif
-- 
1.7.10.4


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