The amount of available ram is determined by the ESDCTL register, so
better don't hardcode the value.
This commit provides a command that can be used instead of
arm_add_mem_device and convertes pcm043 (on which this patch was tested)
to it.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
---
changes since implicit v1:
- support 2nd sdram chip select
- move implementation to arch/arm/mach-imx/esdctl.c
arch/arm/boards/pcm043/pcm043.c | 3 ++-
arch/arm/mach-imx/Makefile | 2 +-
arch/arm/mach-imx/esdctl.c | 45 +++++++++++++++++++++++++++++++
arch/arm/mach-imx/include/mach/esdctl.h | 3 +++
4 files changed, 51 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-imx/esdctl.c
diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index 65e0586..3a309c4 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -46,6 +46,7 @@
#include <mach/imx-pll.h>
#include <mach/iomux-mx35.h>
#include <mach/devices-imx35.h>
+#include <mach/esdctl.h>
static struct fec_platform_data fec_info = {
.xcv_type = MII100,
@@ -103,7 +104,7 @@ static struct imx_ipu_fb_platform_data ipu_fb_data = {
static int pcm043_mem_init(void)
{
- arm_add_mem_device("ram0", IMX_SDRAM_CS0, SZ_128M);
+ imx_add_ram0();
return 0;
}
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 03e2421..cc6fa5e 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -1,4 +1,4 @@
-obj-y += clocksource.o gpio.o
+obj-y += clocksource.o gpio.o esdctl.o
obj-$(CONFIG_ARCH_IMX1) += speed-imx1.o imx1.o iomux-v1.o
obj-$(CONFIG_ARCH_IMX25) += speed-imx25.o imx25.o iomux-v3.o
obj-$(CONFIG_ARCH_IMX21) += speed-imx21.o imx21.o iomux-v1.o
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
new file mode 100644
index 0000000..8695c12
--- /dev/null
+++ b/arch/arm/mach-imx/esdctl.c
@@ -0,0 +1,45 @@
+#include <mach/esdctl.h>
+#include <mach/imx-regs.h>
+#include <asm/io.h>
+#include <asm/memory.h>
+
+static void imx_add_ram(const char* name, resource_size_t base,
+ void __iomem *esdctladdr)
+{
+ u32 esdctl = readl(esdctladdr);
+ /*
+ * with the fields ROW, COL and DSIZ all zero we have 11 rows, 8 cols
+ * and 2 bytes bus width on 4 banks.
+ */
+ resource_size_t size = 4 << (11 + 8 + 1);
+
+ if (!(esdctl & ESDCTL0_SDE))
+ /* SDRAM controller disabled, so no RAM here */
+ return;
+
+ /* calculate memory size: 4 banks * 2^#rows * 2^#cols * bytes/word */
+ size <<= (esdctl & ESDCTL0_ROW_MASK) >> 24;
+ size <<= (esdctl & ESDCTL0_COL_MASK) >> 20;
+
+ if ((esdctl & ESDCTL0_DSIZ_MASK) == ESDCTL0_DSIZ_31_0)
+ /* 4 bytes bus width */
+ size <<= 1;
+
+ arm_add_mem_device(name, base, size);
+}
+
+void imx_add_ram0(void)
+{
+ imx_add_ram("ram0", (resource_size_t)IMX_SDRAM_CS0, (void __iomem *)ESDCTL0);
+}
+
+void imx_add_ram1(void)
+{
+ imx_add_ram("ram1", (resource_size_t)IMX_SDRAM_CS1, (void __iomem *)ESDCTL1);
+}
+
+void imx_add_ram_auto(void)
+{
+ imx_add_ram0();
+ imx_add_ram1();
+}
diff --git a/arch/arm/mach-imx/include/mach/esdctl.h b/arch/arm/mach-imx/include/mach/esdctl.h
index 10c8b9b..688f799 100644
--- a/arch/arm/mach-imx/include/mach/esdctl.h
+++ b/arch/arm/mach-imx/include/mach/esdctl.h
@@ -26,6 +26,7 @@
#define ESDCTL0_DSIZ_31_16 (0 << 16)
#define ESDCTL0_DSIZ_15_0 (1 << 16)
#define ESDCTL0_DSIZ_31_0 (2 << 16)
+#define ESDCTL0_DSIZ_MASK (3 << 16)
#define ESDCTL0_REF1 (1 << 13)
#define ESDCTL0_REF2 (2 << 13)
#define ESDCTL0_REF4 (3 << 13)
@@ -124,3 +125,5 @@
//#define ESDCFGx_tRC_14 0x0000000e // 15 seems to not exist
#define ESDCFGx_tRC_16 0x0000000f
+void imx_add_ram0(void);
+void imx_add_ram1(void);
--
1.7.10.4
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