Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx> writes: > On 11/26/2011 01:17 PM, Robert Jarzmik wrote: >> From: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx> >> >> The core support was brought by Marc and Sascha. >> The cache choice was fixed by Luotao Fu. >> Some gpio and devices addons were provided by Robert. >> >> Signed-off-by: Robert Jarzmik <robert.jarzmik@xxxxxxx> >> Signed-off-by: Luotao Fu <l.fu@xxxxxxxxxxxxxx> >> Signed-off-by: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx> >> Signed-off-by: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx> > > Nitpick: Your S-o-b should be the last one. > ...more nitpicking inline Yep. I think I'll take that patch over a bit more. As it had some signoffs, I didn't take any time to fix it. Now you're asking for more, I'll fix it more deeply, so that checkpatch doesn't complain, neither sparse. That means the former signoffs will have to be given again I'm afraid. >> +# Xscale PXA25x, PXA27x >> +config CPU_XSCALE >> + bool >> + select CPU_32v4T > > Sascha, which CPU is the correct one? If your question is "is the PXA a 32bits, ARMv5, with MMU/caches of the ARMv4 variant", then the answer is yes. The linux kernel agrees with Intel specification on that point. ...zip... >> + * You should have received a copy of the GNU General Public License >> + * along with this program; if not, write to the Free Software >> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, >> + * MA 02111-1307 USA >> + */ > > please remove the FSF's address. Sure, for all occurences. >> diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/mach-pxa/gpio.c >> new file mode 100644 >> index 0000000..f0c8c99 >> --- /dev/null >> +++ b/arch/arm/mach-pxa/gpio.c >> @@ -0,0 +1,70 @@ >> +/* >> + * linux/arch/arm/plat-pxa/gpio.c > > can you adjust the path or remove it completely? Remove, yes. -- Robert _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
