From: Luotao Fu <l.fu@xxxxxxxxxxxxxx> The PXA processor is an ARMv5TE. The cache-armv5.S in barebox is acutally matched to be used with ARMv5TEJ and doesn't get along with a v5TE. Hence we switch the core depenendy to v4t since the callbacks are fully compatible. Signed-off-by: Luotao Fu <l.fu@xxxxxxxxxxxxxx> --- arch/arm/cpu/Kconfig | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/Kconfig b/arch/arm/cpu/Kconfig index b022ed8..f55e862 100644 --- a/arch/arm/cpu/Kconfig +++ b/arch/arm/cpu/Kconfig @@ -48,7 +48,7 @@ config CPU_V7 # Xscale PXA25x, PXA27x config CPU_XSCALE bool - select CPU_32v5 + select CPU_32v4T # Figure out what processor architecture version we should be using. # This defines the compiler instruction set which depends on the machine type. -- 1.7.5.4 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
