On Tue, 22 Feb 2011, Juergen Beisert wrote: > From: Juergen Beisert <juergen@xxxxxxxxxxxxxx> > > When booting from NAND, its important to know the correct page size. Isn't that info available as soon as SteppingStone sucked in the first 4K into the internal SRAM? As far as I can follow the s3c2440 manual, bit 0 and the read-only bits 1 to 3 of the NFCONF register convey that information and these bits are set by sampling a few GPIO (NCON and GPG13-GPG15) pins at reset. Supposedly these pins are pulled up/low during reset so that SteppingStone itself can read the boot code from the NAND. What am I missing? Zoltan _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox
